Solution

The correct answer is A is correct but R is not correct.

Key Points

• Assertion A: True — Instruction pipelining increases CPU throughput by overlapping execution of multiple instructions.
• Reason R: False — Pipelining does not reduce the execution time of a single instruction; it improves overall throughput.
• The latency of an individual instruction remains approximately the same.
• Pipelining improves performance by executing different stages of multiple instructions simultaneously.

Additional Information

• Throughput = number of instructions completed per unit time.
• Latency = time taken to complete a single instruction.
• Pipelining increases throughput but not individual instruction latency.