Q12.Marks: +2.0UGC NET Paper 2: Computer Science 2nd January 2026 Shift 1
Arrange the following events in correct order when an interrupt occurs during instruction execution.
A. Save program counter (PC) and status register.
B. Fetch interrupt vector from memory.
C. Execute the interrupted instruction completely.
D. Transfer control to interrupt service routine (ISR)
E. Restore PC and register after ISR
Choose the correct answer from the options given below:
1.A, B, C, D, E
2.E, D, C, B, A
3.C, A, B, D, E✓ Correct
4.A, B, E, C, D
Solution
The correct answer is C, A, B, D, E.
Key Points
Step C: The interrupted instruction is executed completely to ensure system stability and prevent partial execution.
Step A: The program counter (PC) and status register are saved to preserve the current state of the system.
Step B: The interrupt vector is fetched from memory to identify the appropriate interrupt service routine (ISR).
Step D: Control is transferred to the ISR to handle the interrupt.
Step E: The program counter (PC) and registers are restored after the ISR is executed, allowing the system to return to normal operation.
Additional Information
Interrupt Handling Process:
Interrupts are crucial for handling asynchronous events in computing systems.
The sequence ensures minimal disruption and proper handling of interrupts.
Importance of Saving PC and Registers:
Preserving the PC and registers ensures that the current state is not lost during the interrupt.
This allows the system to resume smoothly after the ISR is executed.
Role of Interrupt Vector:
The interrupt vector points to the memory location of the ISR.
Fetching it is a critical step in identifying the appropriate response to the interrupt.
Execution of ISR:
The ISR handles the specific interrupt request, ensuring the system responds correctly.
Once completed, the system state is restored for normal operation.