Consider a logic gate circuit. with 8 input lines (D0, D1 ..... D7) and 3 output lines (A0, A1, A2) specified by following operations
A2 = D4 + D5 + D6 + D7
A1 = D2 + D3 + D6 + D7
A0 = D1 + D3 + D5 + D0
Where + indicates logical OR operation. This circuit is